Generally speaking, in semiconductor devices, protection elements are formed on the same chips in order that surge currents caused by static electric energy and inverse electromotive force of inductive loads may not destroy internal semiconductor elements. For instance, U.S. Pat. No. 6,365,932 discloses the technical idea as to the above-explained semiconductor element protection.
In a case where a MOSFET functioning as a switching element, a load and a power supply are connected in a series manner, and the MOSFET is switched so as to drive the load, when a surge current is applied from an external source to the MOSFET as an internal element, the MOSFET may be easily destroyed due to a local parasitic NPN transistor operation. As a result, a protection diode is provided between a source and a drain of the MOSFET.
In order to achieve a sufficiently high protection function, the protection diode requires such a performance that this protection diode instantaneously discharges large currents, so that a diode having a low resistance is required.
Generally speaking, diodes are manufactured by implanting ions and performing thermal diffusion with respect to semiconductor substrates. As a consequence, in such a case that both the internal MOSFET and the protection diode are formed in an one chip, the protection diode is constructed by forming both a P region and an N+ region in a surface layer portion of an N− substrate. In the P region, a PN junction is formed in a relatively shallow region along a thickness direction of the substrate in such a manner that the P region is widened along a plane direction of the substrate. More precisely speaking, when the P region is manufactured, after an oxide film has been formed on an upper plane of the N− substrate, a mask is arranged. Thereafter, ion implantation is carried out, and also, the P region is formed by way of thermal diffusion.
However, when such a diode having a low resistance value, namely having a sufficiently large junction area is formed on a chip, there is a problem that the area of this chip is increased.